N01L63W3A
1Mb Ultra-Low Power Asynchronous CMOS SRAM
64K × 16 bit
Overview
The N01L63W3A is an integrated memory device
containing a 1 Mbit Static Random Access Memory
organized as 65,536 words by 16 bits. The device
is designed and fabricated using ON
Semiconductor ’s advanced CMOS technology to
provide both high-speed performance and ultra-low
power. The device operates with a single chip
enable (CE) control and output enable (OE) to
allow for easy memory expansion. Byte controls
(UB and LB) allow the upper and lower bytes to be
accessed independently. The N01L63W3A is
optimal for various applications where low-power is
critical such as battery backup and hand-held
devices. The device can operate over a very wide
temperature range of -40 o C to +85 o C and is
available in JEDEC standard packages compatible
with other standard 64Kb x 16 SRAMs.
Features
? Single Wide Power Supply Range
2.3 to 3.6 Volts
? Very low standby current
2.0μA at 3.0V (Typical)
? Very low operating current
2.0mA at 3.0V and 1μs (Typical)
? Very low Page Mode operating current
0.8mA at 3.0V and 1μs (Typical)
? Simple memory control
Single Chip Enable (CE)
Byte control for independent byte operation
Output Enable (OE) for memory expansion
? Low voltage data retention
Vcc = 1.8V
? Very fas t output enable access time
30ns OE access time
? Automatic power down to standby mode
? TTL compatible three-state output driver
? Compact space saving BGA package avail-
able
Product Family
Part Number
Package Type
Operating
Temperature
Power
Supply
(Vcc)
Speed
Standby Operating
Current (I SB ), Current (Icc),
Typical Typical
N01L63W3AB
48 - BGA
-40 o C to +85 o C 2.3V - 3.6V 70ns @ 2.3V
N01L63W3AT
N01L63W3AB2
44 - TSOP II
48 - BGA Green
55ns @ 2.7V
2 μ A
2 mA @ 1MHz
N01L63W3AT2
44 - TSOP II Green
Pin Configurations
A 4
A 3
A 2
A 1
A 0
CE
I/O 0
I/O 1
I/O 2
I/O 3
VCC
VSS
I/O 4
I/O 5
I/O 6
I/O 7
WE
A 15
A 14
A 13
A 12
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
PIN
ONE
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A 5
A 6
A 7
OE
U B
LB
I/O 15
I/O 14
I/O 13
I/O 12
VSS
VCC
I/O 11
I/O 10
I/O 9
I/O 8
NC
A 8
A 9
A 10
A 11
NC
A
B
C
D
E
F
G
H
1 2 3 4 5
LB OE A 0 A 1 A 2
I/O 8 UB A 3 A 4 CE
I/O 9 I/O 10 A 5 A 6 I/O 1
V SS I/O 11 NC A 7 I/O 3
V CC I/O 12 NC NC I/O 4
I/O 14 I/O 13 A 14 A 15 I/O 5
I/O 15 NC A 12 A 13 WE
NC A 8 A 9 A 10 A 11
48 Pin BGA (top)
6 x 8 mm
6
NC
I/O 0
I/O 2
V CC
V SS
I/O 6
I/O 7
NC
Pin Descriptions
Pin Name
A 0 -A 15
WE
CE
OE
LB
UB
I/O 0 -I/O 15
NC
V CC
V SS
Pin Function
Address Inputs
Write Enable Input
Chip Enable Input
Output Enable Input
Lower Byte Enable Input
Upper Byte Enable Input
Data Inputs/Outputs
Not Connected
Power
Ground
?2008 SCILLC. All rights reserved.
July 2008 - Rev. 9
Publication Order Number:
N01L63W3A/D
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